August 28-29, 2023
Held in conjunction with Euro-Par 2023
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Dr. Thomas Sterling is President and Chief Scientist of Simultac LLC. Since receiving his Ph.D from MIT in 1984 as a Hertz Fellow Dr. Sterling has engaged in applied research in fields associated with parallel computing system structures, semantics, and operation in industry, government labs, and academia. Dr. Sterling is best known as the “father of Beowulf” for his pioneering research in commodity/Linux cluster computing. He was awarded the Gordon Bell Prize in 1997 with his collaborators for this work. He was the PI of the HTMT Project sponsored by NSF, DARPA, NSA, and NASA to explore advanced technologies and their implication for high-end system architectures. Other research projects included the DARPA DIVA PIM architecture project with USC-ISI, the Cray Cascade Petaflops architecture project sponsored by the DARPA HPCS Program, and the Gilgamesh high-density computing project at NASA JPL. Dr. Sterling is the co-author of six books and holds six patents. He was the recipient of the 2013 Vanguard Award, and in 2014 he was named a fellow of the American Association for the Advancement of Science.
Now, as conventional practices preclude further advances of significance, HPC looks towards innovations in architecture, execution models, and programming methods to achieve orders of magnitude gains in efficiency, scalability, and productivity through this decade and beyond. The class of many-task asynchronous computing offers promising new directions at a time when the end of Moore’s Law at nano-scale technology eliminates a previous means of exponential growth. This presentation introduces Active Memory Architecture (AMA), a memory-centric structure and non-von Neumann semantics for parallel execution of time-varying graph-based applications. The wide range of applicable domains include: numeric-intensive problems such as AMR, PIC, and N-body, as well as symbolic-computations for data analytics, machine learning, decision making, and machine understanding. AMA is a leap forward in parallel computer architecture. It is based on the ParalleX execution model, an advanced many-task asynchronous paradigm exploiting runtime information for resource management and task scheduling and replacing the legacy von Neumann architecture with memory-centric structures. Memory latency and memory bandwidth are prioritized rather than FPU utilization. The IARPA AGILE research program is sponsoring the design and analysis of AMA to determine its viability and competitiveness with respect to more conventional strategies. Early analysis suggests that an AMA exascale system with contemporary technologies is achievable in less than 1/10 th the footprint of legacy-derivative computers. Questions by the audience is encouraged throughout the presentation.